| GUC design service covers from 0.5um to
65nm technologies. The high complexity, noise coupling, electro-migration,
dynamic IR drop, and design for manufacturing (DFM) problems
have exceeded the capability of traditional design methodology.
GUC has provided an advanced design flow, which includes quick
prototyping, physical synthesis, hierarchical design and clock
tree synthesis, static timing analysis, formal verification,
power grid design and analysis, cross-talk noise prevention
and fixing, on chip variation (OCV), DFM etc., to achieve rapid
timing and signal integrity closure. GUC design-for-testability
(DFT) methodology provides a complete solution from scan insertion,
boundary scan, memory BIST, scan re-order, test pattern generation
to fault simulation to get ultra-high test coverage. GUC design
service enables customer's design to reach power, DFT, timing
and SI closure quickly.
GUC offers many valuable IPs for SoC design. For digital
IPs, GUC provides USB 1.1/2.0, Ethernet MAC, IDE, JPEG Codec,
TV-encoder. For Star IPs, GUC carries ARM cores, proprietary
DSP and MPEG-4 Codec. For Analog IPs, GUC offers PLL, POR,
ADC, DAC on different technology nodes. For software IPs,
GUC delivers the MP3 Codec, AAC-LC Codec, ARM Codec for audio/speech
application. Besides, GUC provides SoC integration service
from spec to GDSII or RTL to GDSII. GUC is also equipped with
the ARM development platform for quick prototyping.
- Spec-to-GDSII
- RTL-to-GDSII
- Netlist-to-GDSII
- Memory BIST, JTAG, DFT, and ATPG
- IP customization and integration
- Design porting, FPGA to ASIC
- ARM7 / ARM926 / MIPS /Tensilica CPU RTL-to-GDSII
customization and integration for different technology nodes
- IP Customization and integration service
including digital, analog, and software IPs
- Customer prototyping build up service
- Customer project RTL design service
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